Thanks to Andrew J and Mark Rivers I can now cross compuile epics
base for the Xilinx zynq, using the petalinux compiler.
The recipe is:
1) in petalinux tools, make your fpga project and compile it as
defined in Xilinx UG1144.
you need root to build a petalinux project. At argonne, use rootsh,
and put your project on a local disk
to your linux system. rootsh only gives root on local disks.
2) Create new application in petalinux as defined in Xilinx UG981. IN
UG981, the command lines are obselete:
petalinux-app-new is replaced with petalinux-create -t app -n
appname. See page 61 of UG1144.
2.5) run petalinux-config -c rootfs
this will tell the petalinux tools to include yoru app in the final
build.
3) Say your project dir is petalinux/faspaxGBArm. Your app is
epicsbase. So copy the base.x.x.xx.tar.gz into
petalinux/faspaxGBArm/components/apps/epicsbase
gunzip and tar -xvf your base.
4) Edit base.x.x.x/configure/CONFIG_SITE. Change these lines:
CROSS_COMPILER_TARGET_ARCHS=linux-arm
#CROSS_COMPILER_TARGET_ARCHS=vxWorks-ppc32
# If only a subset of the host architectures perform
# the build for the CROSS_COMPILER_TARGET_ARCHS
# uncomment the following line and specify them.
#
5) Edit CONFIG_SITE.Common.linux-x86_64 and
CONFIG_SITE.Common.linux-x86 and comment out
#COMMANDLINE_LIBRARY = READLINE
There is no readline on arm systems...
6) Edit CONFIG_SITE.linux-x86.linux-arm.
Set these lines:
# APS:
GNU_DIR =
/localc/Xilinx/petalinux-v2015.2-final/tools/linux-i386/arm-xilinx-linux-gnueabi
# GNU crosscompiler target name
GNU_TARGET = arm-xilinx-linux-gnueabi
Where GNU dir is the petalinux install. Petalinux has many version of
its compiler, for microblaze etc. For zynq you want it set as above.
Note that petalinux is on a local disk, so we can have rootsh access
as root.
You have to get IT to give you rootsh.
7) cd to your base-x.x.x.x dir. and make.
EPICS base should make
8) To include your base in yoru final FPGA/ARM system
petalinux-build in yoru project dir. This will build the whole
system, include the fpga bit file, and copy in your built epics base
to it ends up on your final ARM filesystem.
I think....
Tim Madden
________________________________________
From: [email protected] [[email protected]]
on behalf of [email protected]
[[email protected]]
Sent: Thursday, March 31, 2016 10:44 AM
To: [email protected]
Subject: Tech-talk Digest, Vol 10, Issue 147
Send Tech-talk mailing list submissions to
[email protected]
To subscribe or unsubscribe via the World Wide Web, visit
https://mailman.aps.anl.gov/mailman/listinfo/tech-talk
or, via email, send a message with subject or body 'help' to
[email protected]
You can reach the person managing the list at
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When replying, please edit your Subject line so it is more specific
than "Re: Contents of Tech-talk digest..."
Today's Topics:
1. Please help us with some problems in building an IOC with
GCS2 module in motorR6-9 using PI C863.11 controller.
Thanks! (???)
2. RE: Please help us with some problems in building an IOC with
GCS2 module in motorR6-9 using PI C863.11 controller.
Thanks!
(Mark Rivers)
3. RE: RE: RE: RE: RE: The camera cannot work when I start the
IOC (Mark Rivers)
4. TFFS on mvme5500 (Stefen Paul)
5. IOC for Rohde & Schwarz FSV (Vitor Finotti)
6. Cross compiling EPICS Base for ARM processor- Xilinx ARM
Petalinux- Antelope Error (Madden, Timothy J.)
7. RE: Cross compiling EPICS Base for ARM processor- Xilinx ARM
Petalinux- Antelope Error (Mark Rivers)
8. RE: Cross compiling EPICS Base for ARM processor- Xilinx ARM
Petalinux- Antelope Error (Madden, Timothy J.)
----------------------------------------------------------------------
Message: 1
Date: Thu, 31 Mar 2016 08:33:39 +0000
From: ??? <[email protected]>
To: "[email protected]" <[email protected]>
Subject: Please help us with some problems in building an IOC with
GCS2 module in motorR6-9 using PI C863.11 controller.
Thanks!
Message-ID:
<[email protected]>
Content-Type: text/plain; charset="gb2312"
Hello,
According to the release notice of EPICS:Motor record at the website
http://www.aps.anl.gov/bcda/synApps/motor/R6-8/motor_release.html .
It says that "Steffen Rau (Physik Instrumente GmbH & Co.) has added
asyn motor support for PI motion controllers that use the GCS2
(General Command Set) command language. This support resides in the
<motor>/motorApp/PIGCS2Src/ directory of the motor module."
It means the GCS2 module should work well form motorR6-8.
I'm trying to build an IOC named C863 with EPICS base-3.14.12.5,
asyn4-23, calc-R3-6-1, motorR6-9.
There is no error message in building the IOC except an weird
stituation in thePI_GCS2Support.dbd file in motorR6-9/dbd directory.
The PI_GCS2Suport.dbd is,
+++++++++++++++++++++++++++++++++++++++++++
include "asyn.dbd"
include "motorRecord.dbd"
##device(motor,VME_IO,devPIasyn,"PI Motor GCS2")
##driver(PIasyn)
registrar(PIasynDriverRegister)
##registrar(PIasynRegister)
+++++++++++++++++++++++++++++++++++++++++++
Why the "PI Motor GCS2" is commented?
Regardless of this, we run the IOC in the terminal, the result of
PI_GCS2_CreateController seemed the C-863.11 controller worked well.
But there is an error when load the db file. The display of the linux
terminal are as follows.
++++++++++++++++++++++++++ the linux terminal display
++++++++++++++++++++++++++++++++
[blctrl@localhost iocC863]$ ../../bin/linux-x86/C863 st.cmd
#!../../bin/linux-x86/C863
## You may have to change C863 to something else
## everywhere it appears in this file
< envPaths
epicsEnvSet("ARCH","linux-x86")
epicsEnvSet("IOC","iocC863")
epicsEnvSet("TOP","/home/blctrl/D-Line")
epicsEnvSet("ASYN","/BLC/epics/modules/asyn4-23")
epicsEnvSet("CALC","/BLC/epics/modules/calc-R3-6-1")
epicsEnvSet("MOTOR","/BLC/epics/modules/motorR6-9")
epicsEnvSet("EPICS_BASE","/BLC/epics/base")
cd "/home/blctrl/D-Line"
## Register all support components
dbLoadDatabase "dbd/C863.dbd"
C863_registerRecordDeviceDriver pdbbase
drvAsynIPPortConfigure("C863","10.30.54.93:4006 TCP",0,0,0)
PI_GCS2_CreateController("PI","C863","1","","","100","1000")
2016/03/29 14:26:06.436 read from C863: (c)2013 Physik
Instrumente(PI) Karlsruhe, C-863.11,0,1.3.0.7
PIasynAxis::PIasynAxis() 0: 1
## Load record instances
#dbLoadTemplate "db/userHost.substitutions"
#dbLoadRecords "db/dbSubExample.db", "user=blctrlHost"
dbLoadRecords "db/motor.db"
Can't set "Motor1.DTYP" to "PI Motor GCS2"
Error at or before ")" in file "db/motor.db" line 4
## Set this to see messages from mySub
#var mySubDebug 1
## Run this to trace the stages of iocInit
#traceIocInit
cd "/home/blctrl/D-Line/iocBoot/iocC863"
iocInit
Starting iocInit
############################################################################
## EPICS R3.14.12.5 $Date: Tue 2015-03-24 09:57:35 -0500$
## EPICS Base built Mar 23 2016
############################################################################
devMotorAsyn::init_record Motor1 bad link invalid INST_IO Must be
asyn(<port> <addr> <timeout>)userParams
2016/03/29 14:26:06.754 devMotorAsyn::build_trans: Motor1 error
calling queueRequest, asynManager::queueRequest asynUser not
associated with a port
2016/03/29 14:26:06.754 devMotorAsyn::build_trans: Motor1 error
calling queueRequest, asynManager::queueRequest asynUser not
associated with a port
iocRun: All initialization complete
## Start any sequence programs
#seq sncExample, "user=blctrlHost"
epics> exit
2016/03/29 14:36:58.631 PIInterface::sendAndReceive error calling
writeRead, output=4 status=3, error=10.30.54.93:4006 TCP disconnected:
2016/03/29 14:36:58.631 PIGCSController:sendAndReceive error calling
write, output=POS? 1 status=3, error=10.30.54.93:4006 TCP disconnected:
2016/03/29 14:36:58.631 PIGCSController:sendAndReceive error calling
write, output=POS? 1 status=3, error=10.30.54.93:4006 TCP disconnected:
[blctrl@localhost iocC863]$
Please give us some advice with this. Thanks!
Best regards,
yongnian
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------------------------------
Message: 2
Date: Thu, 31 Mar 2016 11:49:35 +0000
From: Mark Rivers <[email protected]>
To: ??? <[email protected]>, "[email protected]"
<[email protected]>
Subject: RE: Please help us with some problems in building an IOC with
GCS2 module in motorR6-9 using PI C863.11 controller.
Thanks!
Message-ID:
<70AE7462E7AD054C89DCBA45343D499A65B20A1D@CARSMAIL2.CARS.APS.ANL.GOV>
Content-Type: text/plain; charset="iso-2022-jp"
I think I answered this question for you yesterday.
Why the "PI Motor GCS2" is commented?
Because that support is for an old "model 1" driver that had separate
device support for each model. The driver was replaced by the new
"model 3" type, which uses a model-independent device support.
dbLoadRecords "db/motor.db"
Can't set "Motor1.DTYP" to "PI Motor GCS2"
Error at or before ")" in file "db/motor.db" line 4
This line is your problem. When using the new "model 3" driver you
must use the database that is based on asyn_motor.db or
basic_asyn_motor.db, not motor.db. There use the $(PORT) and $(ADDR)
macros rather than $(C) and $(S).
Mark
________________________________
From: [email protected] [[email protected]]
on behalf of ??? [[email protected]]
Sent: Thursday, March 31, 2016 3:33 AM
To: [email protected]
Subject: Please help us with some problems in building an IOC with
GCS2 module in motorR6-9 using PI C863.11 controller. Thanks!
Hello,
According to the release notice of EPICS:Motor record at the website
http://www.aps.anl.gov/bcda/synApps/motor/R6-8/motor_release.html .
It says that "Steffen Rau (Physik Instrumente GmbH & Co.) has added
asyn motor support for PI motion controllers that use the GCS2
(General Command Set) command language. This support resides in the
<motor>/motorApp/PIGCS2Src/ directory of the motor module."
It means the GCS2 module should work well form motorR6-8.
I'm trying to build an IOC named C863 with EPICS base-3.14.12.5,
asyn4-23, calc-R3-6-1, motorR6-9.
There is no error message in building the IOC except an weird
stituation in thePI_GCS2Support.dbd file in motorR6-9/dbd directory.
The PI_GCS2Suport.dbd is,
+++++++++++++++++++++++++++++++++++++++++++
include "asyn.dbd"
include "motorRecord.dbd"
##device(motor,VME_IO,devPIasyn,"PI Motor GCS2")
##driver(PIasyn)
registrar(PIasynDriverRegister)
##registrar(PIasynRegister)
+++++++++++++++++++++++++++++++++++++++++++
Why the "PI Motor GCS2" is commented?
Regardless of this, we run the IOC in the terminal, the result of
PI_GCS2_CreateController seemed the C-863.11 controller worked well.
But there is an error when load the db file. The display of the linux
terminal are as follows.
++++++++++++++++++++++++++ the linux terminal display
++++++++++++++++++++++++++++++++
[blctrl@localhost iocC863]$ ../../bin/linux-x86/C863 st.cmd
#!../../bin/linux-x86/C863
## You may have to change C863 to something else
## everywhere it appears in this file
< envPaths
epicsEnvSet("ARCH","linux-x86")
epicsEnvSet("IOC","iocC863")
epicsEnvSet("TOP","/home/blctrl/D-Line")
epicsEnvSet("ASYN","/BLC/epics/modules/asyn4-23")
epicsEnvSet("CALC","/BLC/epics/modules/calc-R3-6-1")
epicsEnvSet("MOTOR","/BLC/epics/modules/motorR6-9")
epicsEnvSet("EPICS_BASE","/BLC/epics/base")
cd "/home/blctrl/D-Line"
## Register all support components
dbLoadDatabase "dbd/C863.dbd"
C863_registerRecordDeviceDriver pdbbase
drvAsynIPPortConfigure("C863","10.30.54.93:4006 TCP",0,0,0)
PI_GCS2_CreateController("PI","C863","1","","","100","1000")
2016/03/29 14:26:06.436 read from C863: (c)2013 Physik
Instrumente(PI) Karlsruhe, C-863.11,0,1.3.0.7
PIasynAxis::PIasynAxis() 0: 1
## Load record instances
#dbLoadTemplate "db/userHost.substitutions"
#dbLoadRecords "db/dbSubExample.db", "user=blctrlHost"
dbLoadRecords "db/motor.db"
Can't set "Motor1.DTYP" to "PI Motor GCS2"
Error at or before ")" in file "db/motor.db" line 4
## Set this to see messages from mySub
#var mySubDebug 1
## Run this to trace the stages of iocInit
#traceIocInit
cd "/home/blctrl/D-Line/iocBoot/iocC863"
iocInit
Starting iocInit
############################################################################
## EPICS R3.14.12.5 $Date: Tue 2015-03-24 09:57:35 -0500$
## EPICS Base built Mar 23 2016
############################################################################
devMotorAsyn::init_record Motor1 bad link invalid INST_IO Must be
asyn(<port> <addr> <timeout>)userParams
2016/03/29 14:26:06.754 devMotorAsyn::build_trans: Motor1 error
calling queueRequest, asynManager::queueRequest asynUser not
associated with a port
2016/03/29 14:26:06.754 devMotorAsyn::build_trans: Motor1 error
calling queueRequest, asynManager::queueRequest asynUser not
associated with a port
iocRun: All initialization complete
## Start any sequence programs
#seq sncExample, "user=blctrlHost"
epics> exit
2016/03/29 14:36:58.631 PIInterface::sendAndReceive error calling
writeRead, output=4 status=3, error=10.30.54.93:4006 TCP disconnected:
2016/03/29 14:36:58.631 PIGCSController:sendAndReceive error calling
write, output=POS? 1 status=3, error=10.30.54.93:4006 TCP disconnected:
2016/03/29 14:36:58.631 PIGCSController:sendAndReceive error calling
write, output=POS? 1 status=3, error=10.30.54.93:4006 TCP disconnected:
[blctrl@localhost iocC863]$
Please give us some advice with this. Thanks!
Best regards,
yongnian
------------------------------
Message: 3
Date: Thu, 31 Mar 2016 11:56:00 +0000
From: Mark Rivers <[email protected]>
To: ??? <[email protected]>
Cc: EPICS Tech-Talk <[email protected]>
Subject: RE: RE: RE: RE: RE: The camera cannot work when I start the
IOC
Message-ID:
<70AE7462E7AD054C89DCBA45343D499A65B20AAD@CARSMAIL2.CARS.APS.ANL.GOV>
Content-Type: text/plain; charset="iso-2022-jp"
I have been working with this person at Tsinghua University to solve
a problem with a Point Grey camera. We have been communicating
privately since their original tech-talk message. Starting last night
all of my messages are bouncing on their end. So if anyone else at
Tsinghua is reading tech-talk please let this person know there is a
problem with their e-mail. And this is the reply I am trying to send
them.
**************************************************************
Hi,
OK, those ImageJ pendIO errors are what I wanted to see.
The problem is that you need to set the environment variable
EPICS_CA_MAX_ARRAY_BYTES to be somewhat larger than the maximum image
size you want to send across the network. Your camera is 1288 x 964
monochrome. That is 1241632 bytes. You could set
EPICS_CA_MAX_ARRAY_BYTES to 2000000 or even 10000000. Don't make it
much bigger than is needs to be (like 100 MB) because it will waste
memory.
That needs to be set in both the IOC process and the ImageJ process.
So your should set it in your shell login script. You will need to
restart the IOC and ImageJ after setting it.
All of this is discussed in my online documentation here:
http://cars9.uchicago.edu/software/epics/areaDetectorViewers.html#Troubleshooting
and in the Configuration section of this document:
https://github.com/areaDetector/areaDetector/blob/master/INSTALL_GUIDE.md
Mark
________________________________
From: ??? [[email protected]]
Sent: Wednesday, March 30, 2016 9:12 PM
To: Mark Rivers
Subject: RE: RE: RE: RE: RE: The camera cannot work when I start the IOC
Hi , Mark !
I found it's OK when I set Packet size to 1440 and also the GigE
packet delay has been changed to 800.
In the IOC ,There are errors only when init it . The errors are like
this:
# Records with dynamic enums need to be processed again because the
enum values are not available during iocInit.
zdbpf("13PG1:cam1:Format7Mode.PROC", "1")
st.cmd line 84: Command zdbpf not found.
dbpf("13PG1:cam1:PixelFormat.PROC", "1")
DBR_UCHAR: 1 0x1
# Wait for callbacks on the property limits (DRVL, DRVH) to complete
epicsThreadSleep(1.0)
2016/03/31 09:31:49.113 13PG1:cam1:FrameRate devAsynInt32 process error
# Records that depend on the state of the dynamic enum records or
property limits also need to be processed again
# Other property records may need to be added to this list
dbpf("13PG1:cam1:FrameRate.PROC", "1")
DBR_UCHAR: 1 0x1
2016/03/31 09:31:49.611 13PG1:cam1:FrameRate devAsynInt32 process error
dbpf("13PG1:cam1:FrameRateValAbs.PROC", "1")
DBR_UCHAR: 1 0x1
dbpf("13PG1:cam1:AcquireTime.PROC", "1")
DBR_UCHAR: 1 0x1
However ,the whole software works fine .
In the ImageJ , the errors are here
[cid:467acfab$1$153ca718225$Coremail$pmm15$mails.tsinghua.edu.cn]
But every time I closed the image showing window ,it will open again
.So I suppose ImageJ should have received the picture.
I have set shutter and Gain to manual in the pointGreyProperties
screen and exposure time to 0.1 anf Gain to 0. I also changed the
Maximum to many values from 50 to 10000 ,but the image is still dark
. Does it possible that the arrays IOC outout is all zero ?
--
???
???
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------------------------------
Message: 4
Date: Thu, 31 Mar 2016 18:24:28 +0530
From: Stefen Paul <[email protected]>
To: EPICS Tech Talk <[email protected]>
Subject: TFFS on mvme5500
Message-ID:
<CAETiXDZs-zpNn5R8uUbx0ZLx5dMsQbHNdQJeop1GL53J1ZNFgA@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Hi All,
I am trying to enable support for TFFS on mvme5500 under vxWorks. I have
followed all the necessary guidelines as given in target.ref and
built the
vxwork image accordingly.
But when the board starts running the os image, I get following message:
simRegister : SIMM
tffsDevCreate failed
Due to this the commands like sysTffsFormat() and usrTffsConfig() don't
work.
Looking forward for some help.
Thanks,
Stefen.
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Message: 5
Date: Thu, 31 Mar 2016 10:42:40 -0300
From: Vitor Finotti <[email protected]>
To: [email protected]
Subject: IOC for Rohde & Schwarz FSV
Message-ID: <[email protected]>
Content-Type: text/plain; charset="utf-8"; Format="flowed"
Hello all,
I need to make an IOC for a R&S FSV Signal Analyzer... Does anyone have
already made the .proto, the .db or some piece of code I could use?
Anything would be of great help. Thanks!
Vitor
--
*Vitor Finotti Ferreira*
Beam Diagnostics Group
Brazilian Synchrotron Light Laboratory - LNLS
Centro Nacional de Pesquisa em Energia e Materiais - CNPEM
+ 55 (19) 3512-1010 | Ramal 1018
[email protected] <mailto:[email protected]>
http://cnpem.br/
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------------------------------
Message: 6
Date: Thu, 31 Mar 2016 15:37:54 +0000
From: "Madden, Timothy J." <[email protected]>
To: "[email protected]" <[email protected]>
Subject: Cross compiling EPICS Base for ARM processor- Xilinx ARM
Petalinux- Antelope Error
Message-ID: <[email protected]>
Content-Type: text/plain; charset="iso-8859-1"
Folks
I am attempting to build EPICS into Xilinx Zynq FPGA. I am using
petalinux tools (the xilinx distro of linux) to build in EPICS base.
First I go through setting up the Xilinx petalinux compiler etc. All
my tools work fine. Next I attempt to cross compile epics base using
the Xilinx cross compiler. It works about half way then stops at
antelope.
I do this:
setenv EPICS_HOST_ARCH linux-arm
I edit configure/CONFIG_SITE and add the following lines:
GNU_DIR =
/localc/Xilinx/petalinux-v2015.2-final/tools/linux-i386/arm-xilinx-linux-gnueabi
CMPLR_PREFIX = arm-xilinx-linux-gnueabi-
(I tried putting this into the os/CONFIG.blah blah files, but no
success.)
I then run make in base.xx.xx.xx
The build mostly works, running the correct compiler. .
It stops at antelope/parse.c
Error below. Any ideas how to get past antelope?
Tim Madden
/localc/Xilinx/petalinux-v2015.2-final/tools/linux-i386/arm-xilinx-linux-gnueabi/bin/arm-xilinx-linux-gnueabi-gcc
-c -D_GNU_SOURCE -D_DEFAULT_SOURCE
-DDEFAULT_SKELETON_FILE=include/flex.skel.static -DUNIX
-Dlinux -O3 -g -w -MMD -I. -I../O.Common -I. -I..
-I../../../../include/os/Linux -I../../../../include ../tblcmp.c
rm -f parse.c y.tab.c
rm -f parse.h y.tab.h
../../../../bin/linux-arm/antelope -l -d ../parse.y
../../../../bin/linux-arm/antelope:
../../../../bin/linux-arm/antelope: cannot execute binary file
make[4]: *** [parse.c] Error 126
make[4]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src/toolsComm/flex/O.linux-arm'
make[3]: *** [install.linux-arm] Error 2
make[3]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src/toolsComm/flex'
make[2]: *** [flex.install] Error 2
make[2]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src/toolsComm'
make[1]: *** [toolsComm.install] Error 2
make[1]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src'
make: *** [src.install] Error 2
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------------------------------
Message: 7
Date: Thu, 31 Mar 2016 15:42:28 +0000
From: Mark Rivers <[email protected]>
To: "'Madden, Timothy J.'" <[email protected]>,
"[email protected]" <[email protected]>
Subject: RE: Cross compiling EPICS Base for ARM processor- Xilinx ARM
Petalinux- Antelope Error
Message-ID:
<70AE7462E7AD054C89DCBA45343D499A65B21384@CARSMAIL2.CARS.APS.ANL.GOV>
Content-Type: text/plain; charset="us-ascii"
Don't you want to do
EPICS_HOST_ARCH linux-x86_64
and in
base/configure/CONFIG_SITE
set
CROSS_COMPILER_TARGET_ARCHS=linux-arm
CROSS_COMPILER_HOST_ARCHS=linux-x86_64
From: [email protected]
[mailto:[email protected]] On Behalf Of Madden, Timothy J.
Sent: Thursday, March 31, 2016 10:38 AM
To: [email protected]
Subject: Cross compiling EPICS Base for ARM processor- Xilinx ARM
Petalinux- Antelope Error
Folks
I am attempting to build EPICS into Xilinx Zynq FPGA. I am using
petalinux tools (the xilinx distro of linux) to build in EPICS base.
First I go through setting up the Xilinx petalinux compiler etc. All
my tools work fine. Next I attempt to cross compile epics base using
the Xilinx cross compiler. It works about half way then stops at
antelope.
I do this:
setenv EPICS_HOST_ARCH linux-arm
I edit configure/CONFIG_SITE and add the following lines:
GNU_DIR =
/localc/Xilinx/petalinux-v2015.2-final/tools/linux-i386/arm-xilinx-linux-gnueabi
CMPLR_PREFIX = arm-xilinx-linux-gnueabi-
(I tried putting this into the os/CONFIG.blah blah files, but no
success.)
I then run make in base.xx.xx.xx
The build mostly works, running the correct compiler. .
It stops at antelope/parse.c
Error below. Any ideas how to get past antelope?
Tim Madden
/localc/Xilinx/petalinux-v2015.2-final/tools/linux-i386/arm-xilinx-linux-gnueabi/bin/arm-xilinx-linux-gnueabi-gcc
-c -D_GNU_SOURCE -D_DEFAULT_SOURCE
-DDEFAULT_SKELETON_FILE=include/flex.skel.static -DUNIX
-Dlinux -O3 -g -w -MMD -I. -I../O.Common -I. -I..
-I../../../../include/os/Linux -I../../../../include ../tblcmp.c
rm -f parse.c y.tab.c
rm -f parse.h y.tab.h
../../../../bin/linux-arm/antelope -l -d ../parse.y
../../../../bin/linux-arm/antelope:
../../../../bin/linux-arm/antelope: cannot execute binary file
make[4]: *** [parse.c] Error 126
make[4]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src/toolsComm/flex/O.linux-arm'
make[3]: *** [install.linux-arm] Error 2
make[3]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src/toolsComm/flex'
make[2]: *** [flex.install] Error 2
make[2]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src/toolsComm'
make[1]: *** [toolsComm.install] Error 2
make[1]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src'
make: *** [src.install] Error 2
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Message: 8
Date: Thu, 31 Mar 2016 15:44:46 +0000
From: "Madden, Timothy J." <[email protected]>
To: "Rivers, Mark L." <[email protected]>,
"[email protected]" <[email protected]>
Subject: RE: Cross compiling EPICS Base for ARM processor- Xilinx ARM
Petalinux- Antelope Error
Message-ID: <[email protected]>
Content-Type: text/plain; charset="windows-1252"
Mark
I guess so. I wasn't sure about the cross compiler stuff. Thanks, I
will try.
It seemed that the build did not know we were using a cross compiler.
T
________________________________
From: Mark Rivers [[email protected]]
Sent: Thursday, March 31, 2016 10:42 AM
To: Madden, Timothy J.; [email protected]
Subject: RE: Cross compiling EPICS Base for ARM processor- Xilinx ARM
Petalinux- Antelope Error
Don?t you want to do
EPICS_HOST_ARCH linux-x86_64
and in
base/configure/CONFIG_SITE
set
CROSS_COMPILER_TARGET_ARCHS=linux-arm
CROSS_COMPILER_HOST_ARCHS=linux-x86_64
From: [email protected]
[mailto:[email protected]] On Behalf Of Madden, Timothy J.
Sent: Thursday, March 31, 2016 10:38 AM
To: [email protected]
Subject: Cross compiling EPICS Base for ARM processor- Xilinx ARM
Petalinux- Antelope Error
Folks
I am attempting to build EPICS into Xilinx Zynq FPGA. I am using
petalinux tools (the xilinx distro of linux) to build in EPICS base.
First I go through setting up the Xilinx petalinux compiler etc. All
my tools work fine. Next I attempt to cross compile epics base using
the Xilinx cross compiler. It works about half way then stops at
antelope.
I do this:
setenv EPICS_HOST_ARCH linux-arm
I edit configure/CONFIG_SITE and add the following lines:
GNU_DIR =
/localc/Xilinx/petalinux-v2015.2-final/tools/linux-i386/arm-xilinx-linux-gnueabi
CMPLR_PREFIX = arm-xilinx-linux-gnueabi-
(I tried putting this into the os/CONFIG.blah blah files, but no
success.)
I then run make in base.xx.xx.xx
The build mostly works, running the correct compiler. .
It stops at antelope/parse.c
Error below. Any ideas how to get past antelope?
Tim Madden
/localc/Xilinx/petalinux-v2015.2-final/tools/linux-i386/arm-xilinx-linux-gnueabi/bin/arm-xilinx-linux-gnueabi-gcc
-c -D_GNU_SOURCE -D_DEFAULT_SOURCE
-DDEFAULT_SKELETON_FILE=include/flex.skel.static -DUNIX
-Dlinux -O3 -g -w -MMD -I. -I../O.Common -I. -I..
-I../../../../include/os/Linux -I../../../../include ../tblcmp.c
rm -f parse.c y.tab.c
rm -f parse.h y.tab.h
../../../../bin/linux-arm/antelope -l -d ../parse.y
../../../../bin/linux-arm/antelope:
../../../../bin/linux-arm/antelope: cannot execute binary file
make[4]: *** [parse.c] Error 126
make[4]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src/toolsComm/flex/O.linux-arm'
make[3]: *** [install.linux-arm] Error 2
make[3]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src/toolsComm/flex'
make[2]: *** [flex.install] Error 2
make[2]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src/toolsComm'
make[1]: *** [toolsComm.install] Error 2
make[1]: Leaving directory
`/localc/Xilinx/petalinux/faspaxGBArm/build/linux/rootfs/apps/epicsbase/base-3.14.12.5/src'
make: *** [src.install] Error 2
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