Experimental Physics and
Industrial Control System

Andy Cousins <[email protected]> · Mon, 30 Nov 2015 11:47:33 +0000

Amit,

 I have a document titled "Universe II Manual Addendum" (#

8091142_AD001_05). In section 1.2.7 on page 6 it says:

DTACK* and AS* release

When performing IACK cycles and coupled 8- or 16-bit cycles as a VME

master, the Universe II waited for the VME slave to release DTACK*

before it removes AS*. If the slave card links release of DTACK* to the

release of AS*, a deadlock condition may result because both master and

slave wait for each other to end the cycle. The ANSI VME64 Specification

specifies no slave relationship between DTACK* and AS*, therefore no

assumptions on its behavior should be made by the

slave.

The Universe IIB/IID does not wait for DTACK* to be negated before

negating AS*.

 The conditions for this behaviour seem to be quite specific in

several parameters which could vary between your cases. Could case 3

differ from cases 1 and 2 in being an interrupt cycle, for example?

> Case-1:
> CPU runs under MOTload (native bootloader) and performs A24 cycle.
>
>     CPU asserts AS* and DS* signals.
>     Slave board responds with DTACK*
>     CPU removes AS* and DS*
>     In turn slave also removes DTACK* thereby ending the cycle.
>
> Case-2:
> CPU runs under vxWorks and performs A16 cycle.
>
>     CPU asserts AS* and DS* signals.
>     Slave board responds with DTACK*.
>     CPU then removes AS* and DS*
>     In turn slave also removes DTACK* thereby ending the cycle.
>
> Case-3:
> CPU runs under vxWorks and performs A24 cycle.
>
>     CPU asserts AS* and DS* signals.
>     Slave board responds with DTACK*,

> CPU removes only DS* and not AS*. It expects the slave to remove

DTACK*.

> Only on finding the DTACK* removed by slave, the master removes

AS* ending the cycle.

>
>
> Case-3  (A24, vxWorks) is the most used cycle type.

> It is causing the problem as not every slave follows the sequence

expected.

> Some slave boards do not use DS* to derive DTACK*. They derive

DTACK* using AS* only.

> In such cases CPU's AS* and Slave's DTACK* remain asserted causing a

deadlock.

>

Regards,
Andy

P.S. I don't know where I got my copy of the addendum from but you can

search online for "8091142_AD001_05".

 IDT bought out Tundra Semiconductor and keep some of the

documentation behind a registration wall. Even after I gave their

marketing department my details I couldn't find documents describing old

versions of the chip on their website, they only document the stuff

they're currently selling :-(

P.P.S. This email probably won't thread properly with the originals,

apologies.

--
Andy Cousins
[email protected]
01235 778050

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Experimental Physics and Industrial Control System

Experimental Physics and
Industrial Control System