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<== Date ==> <== Thread ==>

Subject: Re: devlib2 and asyn Pros/Cons
From: Michael Davidsaver <[email protected]>
To: [email protected]
Date: Thu, 21 May 2015 14:32:00 -0400
I take Ernest's question to be more about the relative merits of
hardware interface designs: memory mapped vs. sockets.  This is a hard
question to answer in general.  The best advise I can offer is that it
depends on what the hardware is.  For access to a local FPGA, memory
mapped access is easiest (simplest).  For communication to another micro
processor, message passing might be better.



On 05/21/2015 01:32 PM, Mark Rivers wrote:
> Hi Ernest,
>
> I don't think it is really and either/or question with devlib2 and asyn.  At least for the drivers I've seen they work together.  For example I've written an asyn driver for the SIS3820, but it would be nice to have devlib2 functions to do OS-independent DMA with it.  So asyn drivers make calls to devlib2 functions for OS-independent access to the VME or PCI bus.
>
> How does devlib2 get involved with Ethernet/RS-232 based devices?
>
> Mark
>
> ________________________________________
> From: [email protected] [[email protected]] on behalf of Williams Jr., Ernest L. [[email protected]]
> Sent: Thursday, May 21, 2015 9:26 AM
> To: [email protected]
> Subject: devlib2 and  asyn  Pros/Cons
>
> Hi everyone,
>
> We would like to go down a path of standardizing new EPICS drivers that we develop here at SLAC.
>
>
> Can folks speak about pros/cons for using devlib2-based approach  versus an asyn-based approach for access
> to (1) PCI bus access, VME64x CSR/CSR, and other memory-mapped devices; (2) ethernet/RS232 based; stream-based ?
>
>
> Here at SLAC we have a module that Till wrote which addresses:
> (1) memory and I/O barriers, (2) endianess
> Is this something that belongs in or is now in EPICS BASE?
>
>
>
> Cheers,
> Ernest
>


References:
devlib2 and asyn Pros/Cons Williams Jr., Ernest L.
RE: devlib2 and asyn Pros/Cons Mark Rivers

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