Experimental Physics and
Industrial Control System

Thank you Andrew and Steven,
Indeed that is the problem.
Originally I had the SIS module set to base address 0x20000000 and VSAM to 0x400000.  This combination was generating the exception.

Now I changed the VSAM base address to 0x10000 and I see no exceptions.
I also tried 0x20000, 0x40000, and 0x800000 and all these are OK with the SIS 0x20000000.

Next, I returned to the original VSAM address 0x400000 and I see exceptions.
Finally, I set SIS to 0x21000000, VSAM still at 0x400000 and I still see exceptions.

OK, I will stay away from VSAM 0x400000 base address.

Thanks again,
Zen

> -----Original Message-----
> From: [email protected] [mailto:[email protected]]
> On Behalf Of Steven M. Hartman
> Sent: Tuesday, November 22, 2011 9:08 AM
> To: [email protected]
> Subject: Re: TEMPE_VEAT Exception
> 
> Andrew Johnson wrote:
> 
> > So basically your code is trying to read a D32 value from an A32 location with
> > a supervisory AM, but it's not getting any response (or the target is
> > rejecting an access of that AM or size).
> 
> Zenon--
> 
> It's been a number of years since I used a BiRa VSAM, but I recall
> it had some peculiarities with its VME interface (among other
> quirks) which I needed to work through at the time. (The VSAM is a
> very nice card in terms of performance, though.)
> 
> With Andrew's analysis of your error message, and Google to help my
> memory, this sounds like your problem . . .
> 
> "If you have an A32/D32 module at 0x80400000 and a VSAM at
> 0x00400000, the VSAM will generate a bus error for accesses to the
> other module."
> 
> http://www.slac.stanford.edu/grp/cd/soft/epics/site/vsam/vsam_busError.txt
> 
> In my case, I did not cut the trace, but instead ensured that I
> didn't have the address overlap.
> 
> --
> Steven Hartman
> [email protected]

References:

TEMPE_VEAT Exception Szalata, Zenon M.

Re: TEMPE_VEAT Exception Andrew Johnson

Re: TEMPE_VEAT Exception Steven M. Hartman

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