Experimental Physics and
Industrial Control System

"Szalata, Zenon M." <[email protected]> · Mon, 21 Nov 2011 19:49:34 -0800

Hi Mark,
Unfortunately, it is not Item 1 or 2 you listed:
1. SIS is A32 and VSAM is A24.
2. VSAM is to the right of SIS.  SIS is indeed generating interrupts, whereas VSAM does not use interrupts.

I don't know about item 3.  I think that it is known that VSAM can coexist in the same crate with interrupt generating modules.  Unfortunately, I have practically no experience with VSAM.  I am beginning to learn its use, which I need to know for upgrading some older VME system software.

Thanks Mark,
Zen

> -----Original Message-----
> From: Mark Rivers [mailto:[email protected]]
> Sent: Monday, November 21, 2011 6:56 PM
> To: Szalata, Zenon M.; [email protected]
> Subject: RE: TEMPE_VEAT Exception
> 
> Hi Zen,
> 
> Here are a couple of  possibilities.
> 
> 1) Are you sure that the SIS3300 and the VSAM do not have an address
> conflict?  What address range does each module occupy, and in what VME
> address space(s)?
> 
> 2) I am assuming that the SIS3300 does generate interrupts.  Interrupt
> requests in the VME crate must propogate from the device to the CPU (left-
> most slot).  As the request travels to the CPU, each card must pass the
> interrupt request if it is not requesting itself on that interrupt level or a higher
> one.  Perhaps the VSAM module is not correctly passing the interrupt request.
> Is the VSAM module installed between the SIS3300 and the CPU, or is it
> installed to the right of the SIS3300? If it is installed to the left, try moving it
> to the right and see if that fixes the problem.
> 
> 3) Another possibility is that the VSAM is incorrectly responding to the
> interrupt acknowledge cycle.
> 
> If it is not something simple like 1), then you will probably need a VME bus
> analyzer to figure out what is going wrong.
> 
> Mark
> 
> 
> ________________________________
> 
> From: [email protected] on behalf of Szalata, Zenon M.
> Sent: Mon 11/21/2011 6:54 PM
> To: [email protected]
> Subject: TEMPE_VEAT Exception
> 
> 
> 
> I have a very simple VME setup: mvme6100 and SIS3300.
> 
> The IOC is built with EPICS R3.14.11 and vxWorks 6.6.  For the SIS3300 I am
> using gtr R2.3.
> 
> I load the IOC, supply a gate to the SIS board and some signals and all works
> quite well.
> 
> Next I insert into the VME crate a VSAM module from BiRa (it's an A24/D32 no
> interrupts device, which is basically a 32 channel DVM).  At this point no
> device driver is built into the IOC software for the VSAM device.
> 
> 
> 
> Now, I load the IOC software, without errors.  However, when I enable
> interrupts in the SIS module, for each trigger (gate) I get the following error:
> 
> 
> 
> interrupt:
> 
> Clearing VMEbus exception, attrib reg TEMPE_VEAT = 0xc00ccd00
> 
> 
> 
> The waveforms from the SIS module look almost as expected, but not quite
> right.
> 
> 
> 
> Next I build into the IOC the device driver for the VSAM module, reload the IOC
> and still get the same exception when the SIS module is started.
> 
> 
> 
> I don't understand the reason for this. How is it that a simple module (VSAM)
> in the VME crate can affect the performance of another module (SIS) in the
> same crate.  I don't see this behavior with other VME modules in the same
> crate.
> 
> 
> 
> Thanks in advance for any insight into this,
> 
> Zen

Experimental Physics and Industrial Control System

Experimental Physics and
Industrial Control System