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<== Date ==> <== Thread ==>
Subject: Patch for RTEMS ColdFire uC5282
From: Eric Norum <[email protected]>
To: Tech-talk Techtalk <[email protected]>
Date: Tue, 2 Jun 2009 19:28:54 -0500
The ColdFire MCF5282 processor has a hardware fault that can be worked around only by disabling buffered writes. From the Chip Errata (MCF5282DE, Rev. 6, 5/2009): 
SECF124: Buffered Write May Be Executed Twice
Errata type: Silicon
Affected component: Cache
Description: If buffered writes are enabled using the CACR or ACR
         registers, the imprecise write transaction generated
         by a buffered write may be executed twice.
Workaround: Do not enable buffered writes in the CACR or ACR registers:
           CACR[8] = DBWE (default buffered write enable) must be 0
           ACRn[5] = BUFW (buffered write enable) must be 0
Fix plan: Currently, there are no plans to fix this.
I've committed the change to the RTEMS CVS repository and attached a patch you can apply:

Attachment: patch
Description: Binary data
I ran into this bug in one of my ColdFire/FPGA designs -- some registers in the FPGA were getting written more often than I expected! 

--
Eric Norum <[email protected]>
Advanced Photon Source
Argonne National Laboratory
(630) 252-4793
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