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<== Date ==> <== Thread ==>

Subject: Implementation of an EPICS IOC on an Embedded Soft Core Processor Using Field Programmable Gate Arrays
From: "Curry, Douglas E." <[email protected]>
To: [email protected]
Date: Tue, 19 May 2009 10:51:02 -0400

Geyang,

I was reading your comments from yesterday.  That work is a little over 3 years old now.  I was able to compile epics and get an IOC prompt running on uClinux; however, it was a bit of a hack and calls to the global CTORs were never made during initialization.  Therefore, all I got was an ioc prompt and empty hash table with no commands to execute.  I did not pursue it any further beyond this point.  I was not gaining any momentum with the software team, and rightfully so, it was turning into a big mess.

 

The early days of softcores lacked MMUs and had to run uClinux.  Without full support of C++, calls to the global CTORs were not made along with a handful of other issues.  These days, softcores now have MMUs and can run full flavors of linux.  I would think this shouldn’t be too difficult anymore.  Just speaking from the hip here, I have done no further work on this topic since then.  I’m a hardware guy and don’t want to get into the business of owning/managing IOCs. 

 

My platform of choice is going to be some flavor VME.  The interface is very well understood and easy to integrate into new designs.  If bandwidth is a limitation, I can always go with VXS.  Embedded IOCs are attractive when I can’t get to a VME crate or it is not cost prohibitive to add one.  If I’m going to run an embedded IOC, I would prefer running it over a softcore processor.  The interface is simple and there is very little cost adding it to a design.  Xilinx and Altera both have softcores with MMU support now.   Actel is running some variant of a soft ARM but I don’t know about an MMU. 

 

I would shy away from fixed PPCs found in higher end Xilinx families.  I have read they are going to drop them completely in their next generation of devices.

 

If you’re looking to give it a try, I’d go with a Xilinx or Altera softcore throw in an MMU and run linux over it.

 

Doug


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