Hello,
Maybe this is not the one you need. But in case ...
<http://www.kagaku.com/hoshin/e-pdf/v005.pdf>
Charge integration ADC
VME, 8channels,
30-nano to 1-micro-second integration gate,
14bit,
1-nano-Coulomb max.
Conversion time 15micro-second, so 10k sa/s should be possible.
Best regards.
On Tue, Aug 5, 2008 at 5:20 PM, Leicester, PJ (Pete)
<[email protected]> wrote:
>
> Can anyone recommend a hardware gated ADC? We need one with the following
> features:-
>
> 1) Data collection controlled by a hardware gate signal such that data is
> collected into a buffer when the gate is enabled and when the gate is
> disabled an interrupt is generated so the data can be transferred into an
> I/O Intr processed waveform (or similar) record.
>
> 2) Sample rate up to at the least 10KHz but preferably 100KHz, and an
> absolute minimum of 16 bit.
>
> 3) Epics support for waveform record (or MCA or similar).
>
> 4) Preferably packaged as an IP module but a VME card would be OK.
>
> Note that the essential feature is the gating of collection on the hardware
> signal. We do not want to trigger and collect a fixed number of samples
> (most ADC's do this).
>
> Any suggestions would be gratefully received.
>
> Pete
-----
Kazuro FURUKAWA <[email protected]>
Linac&KEKB, High Energy Accelerator Research Organization (KEK), Japan
Telephone: +81-29-864-5200 x4316, Facsimile: +81-29-864-0321
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