Experimental Physics and
Industrial Control System

"Mark Rivers" <[email protected]> · Tue, 3 Apr 2007 11:25:12 -0500

Hi Ron,

I just ran into that problem here at the NSLS on a VME crate with 4 MAXv cards with rev A5 firmware.

However, I discovered something interesting.  I seemed to fail many times if I rebooted with the power switch (4 out of 4 times)

But if I rebooted with ^Y^Y^Y on the APS doodle card it never failed (0 out of 3 times).

I have seen a similar problem before with the IpUnidig.  A power cycle, or the reset button on a Mupac crate puts lots of transitions on the VME reset line.  Some modules don't like that, they want a single clean pulse on that line (in fact the VME spec requires that I believe).  The APS doodle card is much cleaner, it puts only 1 (or sometimes 2) pulses on the reset line.  The second pulse was sometimes causing problems with the IpUnidig, but in general it is much better than a power cycle or reset button press.

I'd be interested to hear if others see a similar thing.

Mark

________________________________

From: Ronald L. Sluiter [mailto:[email protected]]
Sent: Thu 3/8/2007 1:23 PM
To: EPICS
Subject: OMS MAXv reset/power-up problem

  OMS MAXv users,

Kurt Goetze and I discovered a design problem with the OMS MAXv motion
control board .  The problem is that the MAXv board fails to initialize
correctly
after reset or power-cycling approx. 15% of the time.  OMS explains,

> The FPGA that controlled VME communications of the MAXv controller was
> not consistently reset on initialization. The modification guarantees
> that this
> FPGA is consistently reset on all initializations including power-up
> and SYSRESET.

Of course, the greater the number of MAXv boards in a given IOC, the greater
the chance that one of them will not initialize correctly.

OMS has fixed the problem.  MAXv boards with FPGA code version A6 and
above are fixed.  Users with FPGA code version A5 and below should obtain
a RMA from OMS and request Engineering Change Order (ECO) #1432.
There is no charge for the upgrade.

You can determine the FPGA code version of your MAXv boards by issuing the
following command at the IOC shell (note the "FPGA:B1:A6" section);

> epics> dbior "drvMAXv"
> Driver: drvMAXv
>     Oms MAXv motor card #0 @ 0xFFFFF000, id: MAXv-8000 ver:1.29,
> s/n:000122, FPGA:B1:A6 BOOT:1.1 - Oregon Micro Systems 
> epics>

Until all the MAXv boards in a give IOC are "fixed", I recommend that you
use the above 'dbior "drvMAXv"' command after every reset and power-cycle
to determine if all the MAXv boards have initialized correctly.  The MAXv
boards that did not initialize correctly will have the "... not found."
message.
Example below;

> epics> dbior "drvMAXv"
> Driver: drvMAXv
>     Oms MAXv motor card #0 not found.
>     Oms MAXv motor card #1 @ 0xFFFFF000, id: MAXv-8000 ver:1.29,
> s/n:000122, FPGA:B1:A6 BOOT:1.1 - Oregon Micro Systems 
> value = 0 = 0x0

The only course of action is to keep rebooting until all the MAXv boards
in a given IOC initialize correctly.

Best regards,
Ron Sluiter

Experimental Physics and Industrial Control System

Experimental Physics and
Industrial Control System