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<== Date ==> <== Thread ==>
Subject: EPICS Web Mirror How-To
From: Ralph Lange <[email protected]>
To: EPICS Tech Talk <[email protected]>
Date: Thu, 17 Aug 2006 18:17:57 +0200
Hi All,

To answer some requests I got lately, there's a new How-To in the Wiki area explaining how to set up a local mirror of the EPICS web site.
Please add and correct stuff that is missing or wrong.

Good luck!
Ralph

http://www.aps.anl.gov/epics/wiki/index.php/How_To_Set_Up_a_Mirror_of_the_EPICS_Web_Site

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Next: MVME5500/Kate Feng wrote : > Anyway, the reason why I wanted to > clarify is that there is a cavet about the MVME5500 board, which is > due to its Discovery I system controller. It is a different issue fromwhat was discussed about the dummy read. > * Some PCI devices require Synchronization Barriers or PCI ordering > * for . For example, the VME-OMS58 motor controller we > * used at NSLS requires either enhanced CPU Synchronization Barrier > * or PCI-ordering (only one mechanism is allowed) for the PCI-write. > * The PCI-ordering simply implements a PCI conMVME5500/100 PCI sync. (was Re: Dev lib off-board register access) Kate Feng
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