Thanks everyone for an interesting thread. I think I understand the
issues much better now.
I think the answer to Kate's question is that the dummy read is required
for all VME boards that have pipelines in their VME interface. i.e. it
is not strictly a PPC or mvme5500 issue, but only really surfaces on PPC
boards since they have VME controllers like this.
One of our problems is that on one of the boards the interrupt
acknowledge register is write only - so a read from it generates a bus
error, which isn't as pretty as it should be. I presume (from Andrews
email) that if we read a value from any other readable VME memory
location, that will flush the pipeline just as well. Is that correct?
I also feel that something in devLib that helps with register access and
deals with pipelining, caching and byte swapping issues may help make
code more portable.
Cheers,
Nick Rees
Principal Software Engineer Phone: +44 (0)1235-778430
Diamond Light Source Fax: +44 (0)1235-446713
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