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<== Date ==> | <== Thread ==> |
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Subject: | Re: Dev lib off-board register access |
From: | Eric Bjorklund <[email protected]> |
To: | EPICS tech-talk <[email protected]> |
Date: | Fri, 14 Jul 2006 09:49:38 -0600 |
Eric Bjorklund wrote:
.
In my experience I have usually been able to always get non-DMA drivers to work by always declaring the register pointer as "volatile" (which is more to defeat compiler optimization and not really a caching issue) and following the last write with a dummy read to the same register (to flush the pipeline).
Do you mean the dummy read following the last write is needed for
only vxWorks-mvme5500 ? Or is it needed for almost all the powrPC
boards using VxWorks ? Does it apply to all the VME boards ?
At NSLS, we use RTEMS-MVME5500 BSP that I developed, which
enables the hardware cache snoop on CPU local memory for all the
DMA applications so that the sofware caching is not needed yet.
However, the VME space is marked as Non-Cacheable and
Guarded in the BSP.