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<== Date ==> <== Thread ==>

Subject: Re: Dev lib off-board register access
From: Andrew Johnson <anj@aps.anl.gov>
To: Kate Feng <feng1@bnl.gov>
Cc: EPICS tech-talk <tech-talk@aps.anl.gov>
Date: Fri, 14 Jul 2006 10:45:08 -0500
Kate Feng wrote:

Do you mean the dummy read following the last write is needed for only vxWorks-mvme5500 ? Or is it needed for almost all the powrPC boards using VxWorks ? Does it apply to all the VME boards ?

A dummy read following the last write is needed for Interrupt Service Routines running on most CPU boards nowadays, and certainly for any Universe-2 based board. Even the old 68K boards using the VMEchip2 can have Write Posting enabled on their VME master windows, although I don't think the write pipeline is anywhere near as long in that case so omitting the read might not cause any noticable effects. A common symptoms of omitting the read is to cause suprious interrupts which will probably have a vector of 0xff. These often appear to be harmless, but they do waste CPU time.


Is this implemented in other vxWorks-PPC  site such as APS or any
other facility ?  I did'nt notice this in synApp which was written by
APS, but I am off-site now that I can'nt verify the code.

It is not really sensible to try and resolve this issue in the BSP, it really should be the VME slave board driver's ISR that generates the dummy read since the BSP is probably not aware of any specific VMEbus addresses that it can read from (and it would not be a good idea to perform an access that generates a Bus Error as this would completely kill interrupt performance).


- Andrew
--
Not everything that can be counted counts,
and not everything that counts can be counted.
  -- Albert Einstein

Replies:
Re: Dev lib off-board register access Kate Feng
References:
Dev lib off-board register access Rees, NP (Nick)
Re: Dev lib off-board register access Dirk Zimoch
Re: Dev lib off-board register access Eric Bjorklund
Re: Dev lib off-board register access Kate Feng

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