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<== Date ==> <== Thread ==>

Subject: Re: mvme5500 (was National Instruments VME-MXI-1 modules vs. modern VME CPU modules)
From: Andrew Johnson <[email protected]>
To: Kate Feng <[email protected]>
Cc: EPICS tech-talk <[email protected]>
Date: Thu, 18 Mar 2004 13:04:57 -0600
Kate Feng wrote:

Measured 60x bus bandwidth (MPC7450 + GT64260) : Pipelining disabled : 177 MBytes/sec Pipelining enabled : 589 MBytes/sec

Thus, theoretically, one should be able to disable  the
address pipelining  of the mvme5500 (MPC7455 + GT64260).

There's no way of getting 589MB/s through a regular VMEbus.


Address pipelining on the VMEbus (which was causing the problems with the VME-MXI-1 modules) is not related to address pipelining by the CPU on its local bus, which is presumably what the Motorola paper is quoting. The VMEbus cycle timings are completely controlled by the Tundra Universe-2 chip on Motorola PowerPC boards, and VMEbus address pipelining cannot be disabled.

- Andrew
--
Dear God, I didn't think orange went with purple until I saw
the sunset you made last night.  That was really cool. - Caro


Replies:
Re: mvme5500 (was National Instruments VME-MXI-1 modules vs. modernVME CPU modules) Kate Feng
Re: mvme5500 (was National Instruments VME-MXI-1 modules vs. modernVME CPU modules) Kate Feng
References:
mvme5500 (was National Instruments VME-MXI-1 modules vs. modern VME CPU modules) Kate Feng

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