Subject: |
mvme5500 (was National Instruments VME-MXI-1 modules vs. modern VME CPU modules) |
From: |
Kate Feng <[email protected]> |
To: |
[email protected] |
Date: |
Thu, 18 Mar 2004 13:37:08 -0500 |
Hi all,
This is a clarification about one discussion on
mvme5500 a while ago. Someone wrote :
> CPU modules with a UNIVERSE-II VME interface chip
> (all Motorola 2100, 5100 and 5500 series) do perform address
pipelining
> which results in erratic data transfer from VME-MXI-1 modules. My
> guess is that it is likely that any modern CPU is going
>to cause the same problem.
One Motorola published paper cited :
Measured 60x bus bandwidth (MPC7450 + GT64260) :
Pipelining disabled : 177 MBytes/sec
Pipelining enabled : 589 MBytes/sec
Thus, theoretically, one should be able to disable the
address pipelining of the mvme5500 (MPC7455 + GT64260).
I am about to verify it with the RTEMS BSP.
Regards,
Kate
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