Experimental Physics and
Industrial Control System

GOURNAY Jean-François DAPNIA <[email protected]> · Mon, 17 Nov 2003 19:21:41 +0100

I have 2 EPICS IOCs running reliably for several years now at 500Hz
(MVME3431). The load of the CPU induced by this high clock rate seems
negligeable. For my application, this rate is useful for ADC periodic
scanning but has nothing to do with the periodic DB scanning. I tried 1000Hz
but I had unattended hangs of the system without any clear explanation.

J.F. Gournay
CEA Saclay
DAPNIA/SIS

tel +33 (0)1 69 08 70 32
fax +33 (0)1 69 08 63 01

-----Message d'origine-----
De : Steven Hartman [mailto:[email protected]] 
Envoyé : lundi 17 novembre 2003 17:16
À : EPICS tech-talk
Objet : Re: EPICS periodic scan and sysClkRateSet()

On Mon, 17 Nov 2003, David Maden wrote:

> If you change the clock rate, be careful with the "delay" function of 
> the sequencer, at least with version 1.9.2.Beta12. The argument is no 
> longer seconds if the tick rate is not 60 Hz.

Thanks. We are using sequencer-1.9.5 and it looks like this problem has been
fixed by this version. In seq-1.9.5, all the delays are relative to
sysClkRateGet(), so your conversion factor is no longer needed.

Note that this same problem does appear in some of the old device and driver
support which is included with base in 3.13. Other places in base
(3.13.7) where I have found taskDelay() using a constant include:

	ca/vxWorks_depen.c
	db/dbCa.c
	rec/recWaitCa.c

-- 
Steve Hartman
[email protected] | 919-660-2650
Duke Free Electron Laser Laboratory

Experimental Physics and Industrial Control System

Experimental Physics and
Industrial Control System