Nick,
In my experience with the FORCE Sparc 5 (FRC5CE) these sorts of crashes
within the lower-level db_* code were always the result of alignment
problems with buffers created within the CA message tasks (the software in
base/src/rsrv).
Does the MIPS processor have any specific alignment issues? In upgrading
FRC5CE IOCs to R3.13.0beta11 I found that a few simple changes were
required to the new freeListLib. See either Marty or myself for details.
Peregrine
Peregrine M. McGehee Project Engineer: LEDA Control System
(505) 667-3273 [email protected]
LANSCE-8 Controls & Automation Los Alamos National Laboratory
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