Experimental Physics and
Industrial Control System

"Peregrine M. McGehee" <[email protected]> · Wed, 11 Mar 1998 09:19:26 -0000

Joe,
	Thanks for the gory details... Looks like I'll have make to a few changes.

In regards to the Interrupt Routine - I ended up using the ISR masked with
the IMR to determine the transmit and receive conditions but still use the
SR to check for errors. So I suspect this is OK.

void tyGSOctalInt
<snip>
	block = i/2;
      chan = pTyGSOctalDv->chan;
      regs = pTyGSOctalDv->regs;
	sr = chan->u.r.sr;

	/* Only examine the active interrupts */
      isr = regs->u.r.isr & pQt->imr[block];
      /* Channel B interrupt data is on the upper nibble */
      if ((i%2) == 1) isr >>= 4;

      if (isr & SCC_ISR_RXRDY_A) /* a byte needs to be read */
	<snip RX logic>

	if (isr & SC_ISR_TXRDY_A) /* a byte needs to be sent */
      <snip TX Logic>

      if (sr & 0xf0) 
	<snip ERROR logic>

>Second, interrupts were not being masked out when the IMR's TxRDY bit was
>set during the user's WRITE function. That left open a window when the
> UART's data structure did not match the state of the chip. 

That's definitely a problem here.

> 
> We also decided it was safer not to output the first character from
> the Write function. 
>
Why is that? How do you start the transmit cycle? In my case this occurs in
the transmitter startup routine which is equivalent to the Write fucntion
in the HiDEOS driver.

Peregrine
Peregrine M. McGehee			Project Engineer: LEDA Control System
(505) 667-3273				[email protected]	
LANSCE-8 Controls & Automation	Los Alamos National Laboratory

Experimental Physics and Industrial Control System

Experimental Physics and
Industrial Control System