Experimental Physics and
Industrial Control System

[email protected] (John R. Winans) · Tue, 14 May 1996 09:04:44 -0500

> I reported a problem using GPIB driver with Force CPU-40 as IOC some time ago.
>Recently I finaly pointed out the cause of problem and find the solution.
>
> When you wants to access shared memory of CPU40 cpu board from VMEbus side in
>A24 mode, you need to set up some registers on CPU40 properly. BSP we have
>assumes you don't use A24 mode to access shared memory and does not set up 
>register. And also sysLocalToBusAdrs returns ERROR when it is called with 
>VME_AM_STD_xxx as address space specifier. 

This is apparantly true of of ALL the vxWorks BSPs.

> Another source of trouble is the lack of sysA24Malloc/sysA24Free funtions
>in VxWorks/BSP for CPU40 we use. GP-IB driver uses ordinary malloc/free
>funtions in place of sysA24Malloc/sysA24Free functions. It causes "cache 
>incoherence" problem when GP-IB board uses DMA. 

This should not be a problem (at least on the mv16[27]) because the cache
is snooping the local bus.  And the local bus is used to access the memory 
that is being DMA'd into by the NI1014.  (Either that or the memory is external
to the mv167 and it is not cached at all.)

Does the CPU40's local bus support snooping?

--John Winans

Experimental Physics and Industrial Control System

Experimental Physics and
Industrial Control System