Experimental Physics and
Industrial Control System

In Message-Id: <[email protected]>,
Bob wrote,
 
>Hello Noboru,
> 
>	We have used the NI-1014 - but not with the Force 040. As
>I recall, this board uses DMA. Frequently this requires some
>modification to the memory configuration of the CPU.
> 
> 
>	I hope everything is well. We are doing fine.
> 
>	Best Wishes,
>	Bob

After I sent a question to tech-talk, we found the following fact:

	1) NI-1014 DMA can access VME address in A24 mode.
	2) To accesse Main memory on FORCE cpu40 via VME bus, address mode
should be A32 mode.

These facts  means that the standard GPIB support routines in EPICS does not
work for this combination of boards. We happened to have memory board for VME
bus and allocated buffer space GPIB driver on this memory board. After that,
GPIB support routines are working.

 Regards,

 Noboru Yamamoto
 KEK, Accelerator Dept.

Replies:

Re: Q: NI-1014 GPIB board with Force CPU40. Kazuro FURUKAWA

Navigate by Date:

Prev: Re: output record initialization Gordon Uchenick

Next: Re: output record initialization watson

Index: 1994  <1995>  1996  1997  1998  1999  2000  2001  2002  2003  2004  2005  2006  2007  2008  2009  2010  2011  2012  2013  2014  2015  2016  2017  2018  2019  2020  2021  2022  2023  2024 

Navigate by Thread:

Prev: Q: NI-1014 GPIB board with Force CPU40. Noboru Yamamoto

Next: Re: Q: NI-1014 GPIB board with Force CPU40. Kazuro FURUKAWA

Index: 1994  <1995>  1996  1997  1998  1999  2000  2001  2002  2003  2004  2005  2006  2007  2008  2009  2010  2011  2012  2013  2014  2015  2016  2017  2018  2019  2020  2021  2022  2023  2024