The System Monitor is a single VME card (6U). It utilizes both the front panel and the P2 connector for I/O. The front panel contains a temperature monitor, watchdog status LED, 4 general status LEDs, input for a TTL interrupt, 8 binary inputs (24 volt, 5 volt, and dry contact sense), 4 binary outputs (dry contact, TTL, and 100 mA), serial port (electrical RS-232 or fiber optic), ethernet transceiver (10 BASE-FO or AUI), and a status link to neighbor crates. The P2 connector is used to provide the serial port and ethernet to the processor. In order to abort and read the status of the CPU, a jumper cable must be connected between the CPU and the System Monitor.
The interrupt vector which the System Monitor can generate from any one of its binary inputs, is stored at the function 23 memory location.
In order to make the MVME 167 compatible with VXI message based interrupts, it was necessary to create a module which sits at memory location 0xC008. This module contains, in essence, a full VME interface. When the memory location 0xC008 is written to, the message is captured, and an interrupt is generated. This vector is controlled by function 24. The MVME 167 can then read back the message word, which is stored at location 0xC008.
The System Monitor essentially sits at two memory locations on the VME bus. The VME interface is configured to any valid memory location, but the VXI message based interrupter is hardwired to sit at 0xC000, function 4 (0xC008).
If the VXI message based interrupts are not going to be used, then it is not necessary to include some of the circuitry on the System Monitor. VME PLD B (U41), VME INTERRUPTER B (U42), and CONTROL REGISTER AND INT VECTOR (U43) are not necessary. If these PLDs are taken out, then it is necessary to insert JP26, JP27, JP28, and JP29, J8 and J9 should be removed. This will bypass all of the critical signals which these ICs would normally supply.
The character detector monitors the console serial port for a specific sequence of characters. A Control-X should normally reset the VxWorks Software. Occasionally the CPU will "hang" and without this character detector, it would be necessary to physically go out to the crate and manually reset it. With the System Monitor Board, sending a Control-X followed immediately by a Control-Y will abort the CPU. If this still does not clear up the problem, a Control-X followed by a Control-Y and a Control-Z (this sequence must be completed in 500 mS) will reset the VME backplane.
A jumper cable (J5) must be installed between the MVME 167 and the System Monitor in order to take advantage of the remote monitoring of the CPU statuses and the CPU abort signal.
In addition the binary inputs can also be used to interrupt the VME backplane. These interrupts are maskable, and the mask is the low order byte of function 20.
Located on the front panel is a TTL input which is also a maskable interrupt. The mask for this bit is the least significant bit of the high order byte of function 20.
JP?? determines if the fourth digital output echoes that status of the OUT3 bit or the status of the watchdog timer. Echoing the status of the watchdog timer allows an external system, such as an Allen-Bradley Binary Input Module to monitor the watchdog status of the CPU.
The watchdog is triggered by a read function to the board. The board must be read from every 1.6 seconds or the watchdog will time out. This status is echoed to the Status Monitor as well as the front panel. There is a bi-colored LED on the front panel, green indicates that the CPU is polling the System Monitor, and red indicates that the CPU has stopped.
In addition to a watchdog timer, this function also contains a latch, whose status is echoed by four front panel LEDs (yellow). The LEDs echo the bits in the lower order nibble of function 22. One possible use for these LEDs is to indicate the boot status of the CPU.
It is assumed that the console port will be set to the default configuration of 9600 baud, 1 start bit, 8 data bits, and no parity (9600,1,8,N). This default configuration is hard wired into the part of the circuit which monitors the serial port in order to detect a reset sequence.
TABLE 1. FUNCTION DESCRIPTION
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Function # Function Name Name Description
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18 (LSB) Status Link RX rWATCHDOG_OK (lsb) Watchdog status - bit 0
rnTEMP_OK Temperature status - bit 1
rnSTAT CPU status - bit 2
rnRUN CPU running status - bit 3
r5_OK 5 Volts OK - bit 4
r+-12_OK +-12 &sfgr;oλτσ OK - �ιτ 5
rnFAIL CPU failure - bit 6
START_BIT Undefined - bit 7
18 (MSB) Status Link TX WATCHDOG_OK Watchdog status - bit 8
nTEMP_OK Temperature status - bit 9
nSTAT CPU status - bit 10
nRUN CPU running status - bit 11
5_OK 5 Volts OK - bit 12
+-12_OK +-12 Volts OK - bit 13
nFAIL CPU failure - bit 14
START_BIT (msb) Undefined - bit 15
19 (LSB) Digital Output OUTPUT[0..3] Dry Contact, TTL, 100mA
(reserved bits[4..7])
19 (MSB) Digital Input INPUT[0..7] Dry Contact, 5V-28V
20 Interrupt Mask INPUT[0..6], TTL INPUT, Inputs to generate a VME interrupt
(reserved bits[8..15]
21 Temp Monitor 20 C - 65 C bits[0..7], This is a bar graph where each bit repre
(reserved bits[8..15] sents 5 C.
22 Watchdog LED[0..3], Automatic_Reset[7], Front panel LEDs to show boot status,
(reserved bits[4..6, 8..15] and enable bit for automatic reboot on
watchdog time-out.
23 0xC008 Int Vector DB[0..15] Vector presented when location 0xC008
is written to, (capture of VXI)
24 VME Int Vector DB[0..15] VME interrupt vector, user defined
25 IRQ 1 Vector DB[0..15] Captured 16 bit VXI IRQ1 Vector
26 IRQ 2 Vector DB[0..15] Captured 16 bit VXI IRQ1 Vector
27 IRQ 3 Vector DB[0..15] Captured 16 bit VXI IRQ1 Vector
28 IRQ 4 Vector DB[0..15] Captured 16 bit VXI IRQ1 Vector
29 IRQ 5 Vector DB[0..15] Captured 16 bit VXI IRQ1 Vector
30 IRQ 6 Vector DB[0..15] Captured 16 bit VXI IRQ1 Vector
31 IRQ 7 Vector DB[0..15] Captured 16 bit VXI IRQ1 Vector
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TABLE 2. Digital Output Configuration
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JP[1, 3, 21, 23] JP[2, 4, 22, 24] CONFIGURATION
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IN IN TTL (OUT-, GROUND)
IN OUT 100 mA (OUT-, GROUND)
OUT OUT Dry Contact Sense (OUT+, OUT-)
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TABLE 3. Digital Input Configuration
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JP A JP B CONFIGURATION
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OUT OUT 12V - 28V input (IN+, IN-)
IN OUT 5V - 10V input (IN+, IN-)
OUT IN Dry Contact Sense (IN-, GROUND)
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TABLE 4. Jumpers J6 and J8
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Pins 1-2 Pins 3-4 ... Pins 11-12 Pins 13-14 INT Level
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OUT OUT OUT OUT OUT DISABLED
IN OUT OUT OUT OUT 1
OUT IN OUT OUT OUT 2
OUT OUT ... OUT OU [3..5]
OUT OUT OUT IN OUT 6
OUT OUT OUT OUT IN 7
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TABLE 5. Jumpers J7 and J9
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Pins 1-2 Pins 3-4 Pins 5-6 INT Level
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OUT OUT OUT DISABLED
IN OUT OUT 1
IN IN OUT 2
... ... ... ...
OUT IN IN 6
IN IN IN 7
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FIGURE 1 Configuration Jumper Placement on the System Monitor Board
The Ethernet and serial connection between the System Monitor and the processor utilize the P2 connector on the VME backplane. The A and C rows of each board's P2 connector must be connected together. This can be done using mass terminated 64 pin ribbon cable. This cable is then installed on the rear of the VME crate.
The completed System Monitor Board will contain three daughter boards. One is for the Ethernet connection. In the first version this will just be an AUI connector, the signals from the AUI connector are essentially jumperred from the front panel of the System Monitor to the P2 of the MVME-167.
Another daughter board is for the console serial port. This daughter board will either be an electrical or fiber optic RS-232 transceiver. The two options are offered so that in the laboratory setting the standard (and convenient) electrical interface can be used, and when the boards are installed in the Advanced Photon Source the noise immune fiber optic interface can be used. The transceiver converts the incoming serial signal to TTL levels so that it can be monitored for the reset sequence and then back to RS-232A levels for use by the processor.
The third daughter board is used for the status link between the boards. The circuitry on this board is identical to that on fiber optic transceiver board, except that the MAX233 chip is omitted and pins 19 and 20 are jumperred. This third daughter board was created to make room for cable which supplies the status information from the CPU to the System Monitor.
TABLE 6. Device Support Parameter Field Entry Options ---------------------------------------------------- Parameter Corresponding Register ---------------------------------------------------- StatusLink Status Link Dio Digital I/O IntMask Interrupt Mask Temperature Temperature Monitor Watchdog Watchdog LEDs / Enable Reset VXIVector 0xC008 Interrupt Vector IntVector VME Interrupt Vector for System Monitor IRQ1 Captured IRQ 1 Vector IRQ2 Captured IRQ 2 Vector IRQ3 Captured IRQ 3 Vector IRQ4 Captured IRQ 4 Vector IRQ5 Captured IRQ 5 Vector IRQ6 Captured IRQ 6 Vector IRQ7 Captured IRQ 7 Vector ----------------------------------------------------The Process Variable indicating the Temperature Monitor is meant to be a MBBI. In the device support for the System Monitor Board (devSysmon.c), upon initialization, the record for the MBBI variable is configured to report the proper temperature in Celsius if the Temperature parameter is specified. The bit pattern fields (ZRVL .. FFVL), string fields (ZRST .. FFST) and the number of bits field (NOBT) are preloaded with the proper values.